Semiconductor device with post passivation structure
Abstract:
A semiconductor structure includes a first contact pad over a passivation layer, wherein the first contact pad is in a circuit region. The semiconductor structure further includes a plurality of second contact pads over the passivation layer, wherein each second contact pad of the plurality of second contact pads is in a non-circuit region. The semiconductor structure further includes a first buffer layer over the first contact pad and over a first second contact pad of the plurality of second contact pads. The semiconductor structure further includes a second buffer layer over the first buffer layer, the first contact pad, the first second contact pad and a portion of a second second contact pad of the plurality of second contact pads, wherein the second buffer layer exposes a portion of the second second contact pad of the plurality of second contact pads.
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