A decision feedback equalizer includes: a comparison circuit; a latch circuit configured to latch a result of comparison by the comparison circuit; a setting circuit configured to set a decision threshold of the comparison circuit in accordance with a control signal; and a switch circuit configured to be controlled to be turned on and off by an output signal from the latch circuit, wherein the setting circuit is configured to be connected in parallel with an input stage of the comparison circuit through the switch circuit and operate in synchronization with a clock signal for driving the comparison circuit.