Invention Grant
- Patent Title: Optimization program and mounting work system
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Application No.: US15305174Application Date: 2014-04-24
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Publication No.: US10729048B2Publication Date: 2020-07-28
- Inventor: Yoshihiro Yasui
- Applicant: FUJI CORPORATION
- Applicant Address: JP Chiryu
- Assignee: FUJI CORPORATION
- Current Assignee: FUJI CORPORATION
- Current Assignee Address: JP Chiryu
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- International Application: PCT/JP2014/061556 WO 20140424
- International Announcement: WO2015/162751 WO 20151029
- Main IPC: H05K13/04
- IPC: H05K13/04 ; H05K13/08

Abstract:
With multiple-board substrate defined as a circuit substrate provided with multiple boards of circuit pattern on which multiple electronic components are mounted, when performing mounting work of multiple electronic components on a multiple-board substrate using three mounters lined up in a row, electronic component mounting work procedures are set such that mounting work of electronic components for each of multiple circuit patterns is performed by all three mounters. Work procedures for mounting work of electronic components surrounded by the dashed lines are set to a first mounter, work procedures for mounting work of electronic components surrounded by the single-dashed solid lines are set to a second mounter, and work procedures for mounting work of electronic components surrounded by the double-dashed solid lines are set to a third mounter.
Public/Granted literature
- US10420264B2 Optimization program and mounting work system Public/Granted day:2019-09-17
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