Invention Grant
- Patent Title: Low speed bus interface
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Application No.: US15995947Application Date: 2018-06-01
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Publication No.: US10733132B2Publication Date: 2020-08-04
- Inventor: Eric Pelletier , Boon Siang Choo , Mohammadreza Rozehrezvani
- Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Applicant Address: US TX Houston
- Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee Address: US TX Houston
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F13/42 ; G06F13/10 ; G06F30/34

Abstract:
Methods, apparatus, and systems for transferring data between a first and second module are provided. In one aspect, a method includes receiving, by a virtual controller register, outbound data; arbitrating, at a virtual arbitrate, the outbound data; transmitting, from the virtual controller register to the master low speed bus (LSB) frame/de-frame, the outbound data; adding, at the master LSB frame/de-frame, identification data to the outbound data to create an outbound data frame; transmitting, from the master LSB frame/de-frame to a slave LSB frame/de-frame, the outbound data frame; parsing, at the slave LSB frame/de-frame, the outbound data frame into parsed outbound data; arbitrating the parsed outbound data; transmitting, from the slave LSB frame/de-frame to the target controller register, the parsed outbound data; and receiving, at a target controller port from the target controller register, the parsed outbound data for transmitting to the slave device.
Public/Granted literature
- US20190370205A1 LOW SPEED BUS INTERFACE Public/Granted day:2019-12-05
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