Statistical channel analysis with correlated input patterns
Abstract:
This application discloses a computing system configured to identify that a test input for a channel in an electronic device conforms to protocol having a correlated bit pattern. The computing system can determine transition probabilities for bits in the test input based on the protocol having the correlated bit pattern, and measure a step response of the channel. The computing system can perform statistical simulation or analysis on the channel based, at least in part, on the step response of the channel and the transition probabilities for bits in the test input, which can predict a signal integrity of the channel. The computing system can generate an eye diagram or a develop a bit error rate corresponding to the signal integrity of the channel.
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