A voltage-enhanced-feedback sense amplifier of a resistive memory is configured to sense a first bit line and a second bit line. The voltage-enhanced-feedback sense amplifier includes a voltage sense amplifier and a voltage-enhanced-feedback pre-amplifier. The voltage-enhanced-feedback pre-amplifier is electrically connected to the voltage sense amplifier. A first bit-line amplifying module receives a voltage level of the second input node to suppress a voltage drop of the first bit line and amplifies a voltage level of the first input node according to a voltage level of the first bit line. A second bit-line amplifying module receives the voltage level of the first input node to suppress a voltage drop of the second bit line and amplifies the voltage level of the second input node according to a voltage level of the second bit line. A margin enhanced voltage difference is greater than a read voltage difference.