Invention Grant
- Patent Title: Memory device
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Application No.: US16128720Application Date: 2018-09-12
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Publication No.: US10734055B2Publication Date: 2020-08-04
- Inventor: Hideyuki Sugiyama , Naoharu Shimomura , Kazutaka Ikegami
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@5da5680c
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/16 ; H01L43/02 ; H01L27/22 ; H01L43/10

Abstract:
A memory device according to an embodiment includes: a plurality of memory cells including a storage element having a first and second terminals; a reference resistor having a third and fourth terminals; a first current source electrically connected to the first terminal of the storage element in the selected memory cell; a second current source electrically connected to the third terminal; and a determination circuit that determines the greater one among a resistance value of a storage element of selected one and a resistance value of the reference resistor, the resistance value of the reference resistor being smaller than a middle value between a mean value of first resistance values obtained from the storage elements in the high-resistance state and a mean value of second resistance values obtained from the storage elements in the low-resistance state, and greater than the mean value of the second resistance values.
Public/Granted literature
- US20190287595A1 MEMORY DEVICE Public/Granted day:2019-09-19
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