A memory system includes a nonvolatile memory which includes a memory cell array, and a memory controller which includes a first ECC circuit, and a second ECC circuit having an error correction capability higher than that of the first ECC circuit, and is configured to perform ECC operation on data read from the nonvolatile memory using the first ECC circuit and the ECC circuit. During the ECC operation, the first ECC circuit corrects an error in first read data which is read out of the nonvolatile memory. The memory controller determines whether the hard error occurs in the memory cell array in a case where the first ECC circuit is unable to correct the error. In a case where the hard error occurs, the second ECC circuit performs error correction using second read data that excludes a bit where the hard error occurs.