Invention Grant
- Patent Title: Semiconductor device including isolation layers and method of manufacturing the same
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Application No.: US16035906Application Date: 2018-07-16
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Publication No.: US10734273B2Publication Date: 2020-08-04
- Inventor: Sung Dae Suk , Sang Hoon Lee , Masuoka Sadaaki , Han Su Oh
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associates, LLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@42749eff
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/762 ; H01L29/66 ; H01L29/06 ; H01L29/78 ; H01L29/423 ; H01L29/786

Abstract:
A semiconductor device includes: a pair of wire patterns configured to extend in a first direction and formed on a substrate to be spaced apart from each other in a second direction, the pair of wire patterns disposed closest to each other in the second direction; a gate electrode configured to extend in the second direction on the substrate, the gate electrode configured to surround the wire patterns; and first isolation layers configured to extend in the first direction between the substrate and the gate electrode and formed to be spaced apart from each other in the second direction, the first isolation layers overlapping the pair of wire patterns in a third direction perpendicular to the first and second directions.
Public/Granted literature
- US20190229011A1 SEMICONDUCTOR DEVICE INCLUDING ISOLATION LAYERS AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2019-07-25
Information query
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