Invention Grant
- Patent Title: Interposer test structures and methods
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Application No.: US16148169Application Date: 2018-10-01
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Publication No.: US10734295B2Publication Date: 2020-08-04
- Inventor: Tzuan-Horng Liu , Chen-Hua Yu , Hsien-Pin Hu , Tzu-Yu Wang , Wei-Cheng Wu , Shang-Yun Hou , Shin-Puu Jeng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L21/66 ; H01L23/498 ; G01R1/073 ; H01L23/522 ; H01L23/58 ; H01L21/56 ; H01L21/683

Abstract:
An embodiment of the disclosure is a structure comprising an interposer. The interposer has a test structure extending along a periphery of the interposer, and at least a portion of the test structure is in a first redistribution element. The first redistribution element is on a first surface of a substrate of the interposer. The test structure is intermediate and electrically coupled to at least two probe pads.
Public/Granted literature
- US20190057912A1 Interposer Test Structures and Methods Public/Granted day:2019-02-21
Information query
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