Invention Grant
- Patent Title: Folded semiconductor package architectures and methods of assembling same
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Application No.: US16018635Application Date: 2018-06-26
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Publication No.: US10734318B2Publication Date: 2020-08-04
- Inventor: Bok Eng Cheah , Jackson Chung Peng Kong , Khang Choong Yong , Yun Rou Lim
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@f9b889
- Main IPC: H01L23/49
- IPC: H01L23/49 ; H01L23/498 ; H01L23/00 ; H01L21/768 ; H01L23/538
Abstract:
A fold in a semiconductor package substrate includes an embedded device that includes orthogonal electrical coupling through the package substrate by a bond-pad via that is configured to couple to a semiconductive device that is mounted on the semiconductor package substrate. The semiconductive device is coupled to the embedded device with the orthogonal electrical coupling.
Public/Granted literature
- US20190148269A1 FOLDED SEMICONDUCTOR PACKAGE ARCHITECTURES AND METHODS OF ASSEMBLING SAME Public/Granted day:2019-05-16
Information query
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