Invention Grant
- Patent Title: Dummy flip chip bumps for reducing stress
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Application No.: US16400504Application Date: 2019-05-01
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Publication No.: US10734347B2Publication Date: 2020-08-04
- Inventor: Sheng-Yu Wu , Tin-Hao Kuo , Chita Chuang , Chen-Shien Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/31 ; H01L23/532 ; H01L21/56 ; H01L23/58 ; H01L23/522 ; H01L21/60

Abstract:
A device includes a metal pad over a substrate. A passivation layer includes a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI comprises a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A dummy bump is over the polymer layer, wherein the dummy bump is electrically insulated from conductive features underlying the polymer layer.
Public/Granted literature
- US20190259724A1 Dummy Flip Chip Bumps for Reducing Stress Public/Granted day:2019-08-22
Information query
IPC分类: