Invention Grant
- Patent Title: Multi-packaging for single-socketing
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Application No.: US16008457Application Date: 2018-06-14
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Publication No.: US10734358B2Publication Date: 2020-08-04
- Inventor: Jonathan L. Rosch , Amruthavalli Pallavi Alur , Arun Chandrasekhar , Shawna M. Liff
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L25/065 ; H01L23/492 ; H01L25/10 ; H01L23/538 ; H01L23/00 ; H01L23/495

Abstract:
Processes for configuring a plurality of independent die packages for socketing. The packages are attached to a carrier wafer with a release film. The attached plurality of independent die packages are overmolded to provide a molded multi-die package. The molded multi-die package is planarized to expose the dies, singulated, and released from the carrier wafer. The singulated, molded multi-die packaging may be picked for further processing and placed into a socket. A plurality of molded, multi-die packages may be placed in a socket and operate as a computer system. The independent die packages may each perform and same computer application function or different computer application functions, and may have the same or different dimensions. The socket may have any of a number of configurations as may be needed.
Public/Granted literature
- US20190385979A1 MULTI-PACKAGING FOR SINGLE-SOCKETING Public/Granted day:2019-12-19
Information query
IPC分类: