Invention Grant
- Patent Title: SGT-including pillar-shaped semiconductor device and method for producing the same
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Application No.: US16238816Application Date: 2019-01-03
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Publication No.: US10734391B2Publication Date: 2020-08-04
- Inventor: Fujio Masuoka , Nozomu Harada
- Applicant: Unisantis Electronics Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: Unisantis Electronics Singapore Pte. Ltd.
- Current Assignee: Unisantis Electronics Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Brinks Gilson & Lione
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@1934db27 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@38af03be
- Main IPC: H01L21/225
- IPC: H01L21/225 ; H01L27/11 ; H01L23/485 ; H01L29/423 ; H01L21/768 ; H01L23/522 ; H01L29/66 ; H01L29/78 ; H01L21/20 ; H01L21/28 ; H01L21/285 ; H01L21/76 ; H01L21/764 ; H01L21/822 ; H01L21/8234 ; H01L23/528 ; H01L29/04 ; H01L29/06 ; H01L29/10 ; H01L29/40 ; H01L29/417 ; H01L29/49 ; H01L21/308 ; H01L21/8238 ; H01L29/16 ; H01L29/51 ; H01L21/311 ; H01L23/532
Abstract:
A first contact hole is formed so as to extend to a NiSi layer as a lower wiring conductor layer connecting to an N+ layer of an SGT formed within a Si pillar, and so as to extend through a NiSi layer as an upper wiring conductor layer connecting to a gate TiN layer, and a NiSi layer as an intermediate wiring conductor layer connecting to an N+ layer. A second contact hole is formed so as to extend to the NiSi layer, and surround, in plan view, the first contact hole. An insulating SiO2 layer is formed on a side surface of the NiSi layer. A wiring metal layer in the contact holes connects the NiSi layer and the NiSi layer to each other.
Public/Granted literature
- US20190252392A1 SGT-INCLUDING PILLAR-SHAPED SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME Public/Granted day:2019-08-15
Information query
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