Invention Grant
- Patent Title: Method for forming semiconductor device structure with metal silicide layer
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Application No.: US16179165Application Date: 2018-11-02
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Publication No.: US10734489B2Publication Date: 2020-08-04
- Inventor: Gulbagh Singh , Cheng-Yeh Huang , Chin-Nan Chang , Chih-Ming Lee , Chi-Yen Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L21/762 ; H01L21/768 ; H01L21/324 ; H01L29/45 ; H01L21/265

Abstract:
A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate. The method includes forming an isolation structure in the semiconductor substrate. The isolation structure surrounds a first active region and a second active region of the semiconductor substrate. The method includes forming a semiconductor strip structure over the semiconductor substrate. The semiconductor strip structure extends across the first active region, the second active region, and the isolation structure between the first active region and the second active region, the semiconductor strip structure has a P-type doped region, an N-type doped region, and a spacing region. The method includes performing an implantation process over the spacing region. The method includes forming a metal silicide layer over the semiconductor strip structure to cover the P-type doped region, the N-type doped region, and the spacing region.
Public/Granted literature
- US20200044035A1 METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE WITH METAL SILICIDE LAYER Public/Granted day:2020-02-06
Information query
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