In one form, an analog-to-digital converter (ADC) includes first and second ring-oscillator ADCs, a modulus subtractor, and a decimation filter. The first and second ring-oscillator ADCs are responsive to true and complement input voltages, respectively, have outputs for providing first and second digital phase signals, respectively, each having a first predetermined number of bits sampled at a first frequency. The modulus subtractor subtracts the second digital phase signal from the first digital phase signal to provide a phase difference signal. The decimation filter differentiates the phase difference signal at a second frequency lower than said the frequency to provide a frequency signal proportional to a differential voltage between the true input voltage and the complementary input voltage, and decimates the frequency signal to provide a digital code having a second predetermined number of bits greater than the first predetermined number of bits.