Invention Grant
- Patent Title: Method and apparatus for fabricating wafer by calculating process correction parameters
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Application No.: US16385512Application Date: 2019-04-16
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Publication No.: US10739688B2Publication Date: 2020-08-11
- Inventor: Boris Habets
- Applicant: Qoniac GmbH
- Applicant Address: DE Dresden
- Assignee: Qoniac GmbH
- Current Assignee: Qoniac GmbH
- Current Assignee Address: DE Dresden
- Agency: Hodgson Russ LLP
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F7/20 ; H01L21/66 ; G05B17/02
Abstract:
A method of calculating an overlay correction model in a unit for the fabrication of a wafer is disclosed. The method comprises measuring overlay deviations of a subset of first overlay marks and second overlay marks by determining the differences between the subset of first overlay marks generated in the first layer and corresponding ones of the subset of second overlay marks generated in the second layer.
Public/Granted literature
- US20190243255A1 Method and Apparatus for Fabricating Wafer By Calculating Process Correction Parameters Public/Granted day:2019-08-08
Information query
