An error correction method and a chip kill detection method of a memory including a plurality of chips may be provided. The method may include a first data error detection step of detecting whether an error exists in data outputted from the plurality of chips. The method may include a random error correction step of correcting an error occurred in data when it is detected in the first data error detection step that an error exists. The method may include a chip kill detection step of determining, when an error occurs even after the random error correction step, that a chip kill error has occurred, and detecting a chip where the chip kill error has occurred, by correcting the error through assuming one chip among the plurality of chips as a chip where the chip kill error has occurred.