Invention Grant
- Patent Title: NAND flash operating techniques mitigating program disturbance
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Application No.: US16212551Application Date: 2018-12-06
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Publication No.: US10741262B2Publication Date: 2020-08-11
- Inventor: Wei-Liang Lin , Chun-Chang Lu , Wen-Jer Tsai , Guan-Wei Wu , Yao-Wen Chang
- Applicant: MACRONIX INTERNATIONAL CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee: MACRONIX INTERNATIONAL CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes Beffel & Wolfeld LLP
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/10 ; G11C16/04 ; G11C16/08 ; G11C16/24 ; G11C16/26 ; G11C8/08 ; H01L27/11556 ; H01L27/11582 ; H01L27/1157 ; H01L27/11524

Abstract:
A programming operation for high density memory, like 3D NAND flash memory, modifies the waveforms applied during program operations to mitigate unwanted disturbance of memory cells not selected for programming during the operation. Generally, the method provides for applying a bias arrangement during an interval of time between program verify pass voltages and program pass voltages in a program sequence that can include a soft ramp down, and pre-turn-on voltages designed to reduce variations in the potential distribution on floating channels of unselected NAND strings during a program operation.
Public/Granted literature
- US20200118630A1 NAND FLASH OPERATING TECHNIQUES Public/Granted day:2020-04-16
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