Invention Grant
- Patent Title: Standby biasing techniques to reduce read disturbs
-
Application No.: US16390558Application Date: 2019-04-22
-
Publication No.: US10741263B2Publication Date: 2020-08-11
- Inventor: Michele Piccardi , Xiaojiang Guo , Shigekazu Yamada
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C16/34 ; G11C16/30 ; G11C16/04 ; G11C16/08 ; G11C11/56

Abstract:
Devices and techniques are disclosed herein to provide a high-voltage bias signal in a standby state of the storage system without exceeding a limited maximum standby current allowance of the storage system. The high-voltage bias signal can enable a string driver circuit in the standby state to couple a global word line to a local word line, to provide a bias to, or sink a voltage from, a pillar of a string of memory cells of the storage system in the standby state, such as to reduce read disturbances in the storage system.
Public/Granted literature
- US20200211661A1 STANDBY BIASING TECHNIQUES TO REDUCE READ DISTURBS Public/Granted day:2020-07-02
Information query