Invention Grant
- Patent Title: Thermopile bias method for low voltage infrared readout integrated circuits
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Application No.: US16532062Application Date: 2019-08-05
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Publication No.: US10746594B1Publication Date: 2020-08-18
- Inventor: Gerard Quilligan , Shahid Aslam , Nicolas Gorius , Daniel Glavin , John Kolasinski , Dat Tran
- Applicant: UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR OF NASA
- Applicant Address: US DC Washington
- Assignee: United States of America as represented by the Administrator of NASA
- Current Assignee: United States of America as represented by the Administrator of NASA
- Current Assignee Address: US DC Washington
- Agent Christopher O. Edwards; Bryan A. Geurts; Helen M. Galus
- Main IPC: G01J1/42
- IPC: G01J1/42 ; G01J5/12 ; G01K7/02 ; G01J1/30 ; H03M1/18 ; G01J1/20 ; G01J1/16
Abstract:
An apparatus include one or more DACs and a resistor divider are configured to generate a variable bias voltage VBIAS with respect to a CM voltage VCM. The CM voltage VCM is applied to a cathode of one or more thermopiles or a negative input of one or more amplifiers to prevent saturation and over range of one or more low voltage readout amplifiers and one or more ADCs.
Public/Granted literature
- US3133972A Selective reduction of aromatic disulfides Public/Granted day:1964-05-19
Information query
