Invention Grant
- Patent Title: Accelerated wafer testing using non-destructive and localized stress
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Application No.: US15803969Application Date: 2017-11-06
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Publication No.: US10746782B2Publication Date: 2020-08-18
- Inventor: Benjamin D. Briggs , Lawrence A. Clevenger , Nicholas A. Lanzillo , Michael Rizzolo , Theodorus E. Standaert , James H. Stathis
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R31/28

Abstract:
Embodiments of the invention are directed to a semiconductor wafer test system. A non-limiting example of the test system includes a controller, a sensing system communicatively coupled to the controller, and a stress source communicatively coupled to the controller. The controller is configured to control the stress source to deliver an applied stress to a targeted stress area of a semiconductor wafer. The sensing system is configured to detect the applied stress and provide data of the applied stress to the controller. The controller is further configured to control the stress source based at least in part on the data of the applied stress.
Public/Granted literature
- US20180328979A1 ACCELERATED WAFER TESTING USING NON-DESTRUCTIVE AND LOCALIZED STRESS Public/Granted day:2018-11-15
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