- Patent Title: Reducing disturbance between adjacent regions of a memory device
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Application No.: US15598446Application Date: 2017-05-18
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Publication No.: US10747448B2Publication Date: 2020-08-18
- Inventor: Jung-Hyun Kwon , Sang-Gu Jo , Do-Sun Hong
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@3a0bd214
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G11C13/00 ; G06F1/24 ; G11C7/02

Abstract:
A memory system includes a memory device including one or more memory blocks, and configured to store data in a plurality of pages included in each memory block through a write operation, and a memory controller configured to count an operation number of write operations performed on the memory block, check whether the write operation is performed for each of the pages, select one or more victim pages among the pages, and copy data stored in the victim pages.
Public/Granted literature
- US20180088840A1 MEMORY SYSTEM AND OPERATING METHOD FOR THE SAME Public/Granted day:2018-03-29
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