Invention Grant
- Patent Title: Apparatuses and methods for accessing hybrid memory system
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Application No.: US15669753Application Date: 2017-08-04
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Publication No.: US10747463B2Publication Date: 2020-08-18
- Inventor: Kazuhiko Kajigaya
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
Apparatuses and methods for controlling word lines and sense amplifiers in a semiconductor device are described. An example apparatus includes: a memory array including a plurality of memory cells; a memory controller that transmits a command signal, address signals and further provides and receives data signals; a first port including: a first command terminal that receives the first command signal from the memory controller; first address terminals that receive first address signals from the memory controller; and first data terminals that receive first data signals from the memory controller and further transmit first data signals to the memory controller; and a second port including: a second command terminal that receives a second command signal from the memory controller; second address terminals that receive second address signals from the memory controller; and second data terminals that receive second data signals from an external apparatus other than the memory controller and further transmit second data signals to the external apparatus.
Public/Granted literature
- US20190042120A1 APPARATUSES AND METHODS FOR ACCESSING HYBRID MEMORY SYSTEM Public/Granted day:2019-02-07
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