A non-volatile memory device includes a memory cell array, a Y decoder, a program register, a sense amplifier, a verification circuit and a path control circuit. The memory cell array includes a first memory cell. The first memory cell is connected with a bit line. The Y decoder includes a first decoding element. The first decoding element is connected between the bit line and a data line. The program register is connected with the data line, and generates a control voltage to the first memory cell. The sense amplifier is connected with the data line, and generates a read data. The verification circuit is connected between the sense amplifier and the data line, and generates a rewrite data. The path control circuit is connected with the data line, and receives a write data and the rewrite data.