An image processing apparatus capable of performing pixel synthesis processing at high speed. Synthesis processing of a first object and a second object is performed for an area where the first object and the second object overlap each other. A first image formation processor stores first pixel data, which corresponds to the area, of pixel data of the first object, in a first communication memory and stores second pixel data, which corresponds to the area, of pixel data of the second object, in a second communication memory. A second image formation processor acquires the first and second pixel data from the first and second communication memories, respectively, and performs synthesis processing of the acquired first and second pixel data.