A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference xvoltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.