Invention Grant
- Patent Title: Methods and structures for wafer-level system in package
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Application No.: US16176098Application Date: 2018-10-31
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Publication No.: US10756056B2Publication Date: 2020-08-25
- Inventor: Mengbin Liu
- Applicant: Ningbo Semiconductor International Corporation
- Applicant Address: CN Ningbo
- Assignee: Ningbo Semiconductor International Corporation
- Current Assignee: Ningbo Semiconductor International Corporation
- Current Assignee Address: CN Ningbo
- Agency: Anova Law Group, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@60275743 com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@69f0658f com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@6d694c93
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L25/065 ; H01L23/538 ; H01L23/00 ; H01L21/48 ; H01L21/56 ; H01L25/00 ; H01L21/683 ; H01L23/31 ; H01L21/768 ; H01L23/48
Abstract:
The present disclosure provides a packaging method for wafer-level system in package. The packaging method for wafer-level system in package includes bonding at least two wafers together along a stacking direction perpendicular to surfaces of the at least two wafers, each wafer containing a plurality of chips. The bonding includes adjoining two wafers to-be-bonded together, and after adjoining, forming a plurality of plugs to electrically connect the plurality of chips in the two wafers.
Public/Granted literature
- US20190115314A1 METHODS AND STRUCTURES FOR WAFER-LEVEL SYSTEM IN PACKAGE Public/Granted day:2019-04-18
Information query
IPC分类:
