A semiconductor package includes a package substrate, a logic chip on the package substrate, a memory stack structure on the package substrate and including first and second semiconductor chips stacked along a first direction, and a first bump between the package substrate and the memory stack structure. The logic chip and the memory stack are spaced apart along a second direction, crossing the first direction, on the package substrate. The first semiconductor chip includes a through via electrically connected to the second semiconductor chip, a chip signal pad connected to the through via, and a first redistribution layer electrically connected to the chip signal pad and having an edge signal pad in contact with the first bump. A distance between the logic chip and the edge signal pad along the second direction is less than that between the logic chip and the chip signal pad.