Invention Grant
- Patent Title: Hybrid semiconductor transistor structure and manufacturing method for the same
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Application No.: US15981167Application Date: 2018-05-16
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Publication No.: US10756089B2Publication Date: 2020-08-25
- Inventor: Hung-Li Chiang , I-Sheng Chen , Tzu-Chiang Chen
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L27/092 ; H01L29/78 ; H01L29/786 ; H01L21/02 ; H01L21/8238 ; H01L29/66 ; H01L21/324 ; H01L29/161

Abstract:
Present disclosure provides a hybrid semiconductor transistor structure, including a substrate, a first transistor on the substrate, a channel of the first transistor including a fin and having a first channel height, a second transistor adjacent to the first transistor, a channel of the second transistor including a nanowire, and a separation laterally spacing the fin from the nanowire. The first channel height is greater than the separation. Present disclosure also provides a method for manufacturing the hybrid semiconductor transistor structure.
Public/Granted literature
- US20190355724A1 HYBRID SEMICONDUCTOR TRANSISTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SAME Public/Granted day:2019-11-21
Information query
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