Invention Grant
- Patent Title: Polishing composition, polishing method, and method for manufacturing semiconductor substrate
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Application No.: US16084724Application Date: 2017-03-06
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Publication No.: US10759969B2Publication Date: 2020-09-01
- Inventor: Masaki Tada
- Applicant: FUJIMI INCORPORATED
- Applicant Address: JP Kiyosu-Shi
- Assignee: FUJIMI INCORPORATED
- Current Assignee: FUJIMI INCORPORATED
- Current Assignee Address: JP Kiyosu-Shi
- Agency: Foley & Lardner LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@30de6a3d
- International Application: PCT/JP2017/008825 WO 20170306
- International Announcement: WO2017/163847 WO 20170928
- Main IPC: C09G1/02
- IPC: C09G1/02 ; C09K3/14 ; H01L21/306
Abstract:
The present invention provides a polishing composition which is suitable for polishing an object to be polished having a layer containing a Group III-V compound, suppresses etching of the Group III-V compound, and is capable of polishing at a high polishing speed. The polishing composition according to the present invention is a polishing composition used for polishing an object to be polished having a layer containing a Group III-V compound and contains abrasive grains, an oxidizer, and an anionic surfactant.
Public/Granted literature
- US20190071588A1 POLISHING COMPOSITION, POLISHING METHOD, AND METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE Public/Granted day:2019-03-07
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