Invention Grant
- Patent Title: Synchronization of computation engines with non-blocking instructions
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Application No.: US16217858Application Date: 2018-12-12
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Publication No.: US10761822B1Publication Date: 2020-09-01
- Inventor: Drazen Borkovic , Jindrich Zejda , Taemin Kim , Ron Diamant
- Applicant: Amazon Technologies, Inc.
- Applicant Address: US WA Seattle
- Assignee: Amazon Technologies, Inc.
- Current Assignee: Amazon Technologies, Inc.
- Current Assignee Address: US WA Seattle
- Agency: Kilpatrick Townsend & Stockton LLP
- Main IPC: G06F11/36
- IPC: G06F11/36 ; G06F17/10 ; G06F3/048 ; G06F13/40 ; G06F17/50 ; G06F9/30 ; G06F12/00 ; G06F8/41 ; G06N3/02 ; G06F12/1081 ; G06F12/06 ; G06F12/0888 ; G06F8/34 ; G06F9/50 ; G06F9/455

Abstract:
Provided are systems and methods for generating program code for an integrated circuit, where instructions in the code synchronize computation engines that support non-blocking instructions. In various examples, a computing device can receiving an input data set including operations to be performed by an integrated circuit device and dependencies between the operations. The input data set can include a non-blocking instruction, and an operation that requires that the non-blocking instruction be completed. The computing device can generate instructions for performing the operation including a particular instruction to wait for a value to be set in a register of the integrated circuit device. The computing device can further generate program code including the non-blocking instruction and the instructions for performing the operation, wherein the non-blocking instruction is configured to set the value in the register.
Information query