Invention Grant
- Patent Title: Trim setting determination on a memory device
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Application No.: US16442792Application Date: 2019-06-17
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Publication No.: US10761980B2Publication Date: 2020-09-01
- Inventor: Aswin Thiruvengadam , Daniel L. Lowrance , Peter Feeley
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C11/40
- IPC: G11C11/40 ; G06F12/02 ; G11C11/406 ; G11C16/20 ; G11C16/34 ; G06F13/16 ; G11C16/32 ; G06F16/18 ; G11C7/20 ; G11C29/02 ; G11C29/44
Abstract:
The present disclosure includes apparatuses and methods related to determining trim settings on a memory device. An example apparatus can determine a set of trim settings for the array of memory cells based on the operational characteristics of the array of memory cells, wherein the set of trim settings are associated with desired operational characteristics for the array of memory cells.
Public/Granted literature
- US20190303290A1 TRIM SETTING DETERMINATION ON A MEMORY DEVICE Public/Granted day:2019-10-03
Information query
