Invention Grant
- Patent Title: IC chip and method of determining a fuse to be cut off
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Application No.: US16351844Application Date: 2019-03-13
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Publication No.: US10763815B2Publication Date: 2020-09-01
- Inventor: Tamio Ikehashi , Hiroaki Yamazaki
- Applicant: KABUSHIKI KAISHA TOSHIBA
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4405b527
- Main IPC: H03H7/38
- IPC: H03H7/38 ; H01L41/09 ; H01L41/04 ; H01H59/00 ; H01L41/053 ; H01H37/04

Abstract:
According to one embodiment, an IC chip includes a plurality of fuse elements including a plurality of fuse portions each of which is to be cut off by a stress, and a plurality of actuator portions provided for the plurality of fuse portions, respectively, and each of which applies a stress to corresponding one of fuse portions, and a control circuit supplying a control signal for cutting off desired one of the fuse portions to corresponding one of the actuator portions.
Public/Granted literature
- US20200076394A1 IC CHIP AND METHOD OF DETERMINING A FUSE TO BE CUT OFF Public/Granted day:2020-03-05
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