Invention Grant
- Patent Title: Apparatuses and methods involving phase-error tracking circuits
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Application No.: US16502907Application Date: 2019-07-03
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Publication No.: US10763871B1Publication Date: 2020-09-01
- Inventor: Manoj Kumar Patasani , Tarik Saric , Juan Felipe Osorio Tamayo
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Agent Rajeev Madnawat
- Main IPC: H03L7/087
- IPC: H03L7/087 ; H03L7/23 ; H03L7/113 ; H03C3/09 ; H04L27/12 ; H03L7/187

Abstract:
Embodiments are directed to apparatuses and methods involving a phase-error tracking circuit. An example apparatus includes a divide-by phase locked loop (PLL) circuit to generate a continuous wave signal that sweeps over a frequency range in response to a divider feedback signal and to a reference signal. The apparatus further includes the phase-error tracking circuit defining a phase-error window in which the divide-by PLL circuit is to lock based on a slope associated with a rate of change of the frequency range, and indicating whether a phase error between the divider feedback signal and the reference signal coincides with the phase-error window.
Information query
IPC分类: