Invention Grant
- Patent Title: Multilayer wiring board
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Application No.: US16561518Application Date: 2019-09-05
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Publication No.: US10765011B2Publication Date: 2020-09-01
- Inventor: Shigeki Chujo , Koichi Nakayama
- Applicant: Dai Nippon Printing Co., Ltd.
- Applicant Address: JP Tokyo
- Assignee: Dai Nippon Printing Co., Ltd.
- Current Assignee: Dai Nippon Printing Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@2b3b88a2
- Main IPC: H05K3/40
- IPC: H05K3/40 ; H01L21/48 ; H05K3/42 ; H05K3/46 ; H01L23/498 ; H05K3/44 ; H05K3/00 ; C23C16/02 ; C23C16/18 ; H01L21/683 ; H05K1/03 ; H05K3/38

Abstract:
A multilayer wiring board having a high degree of freedom of wiring design and realizing high-density wiring, and a method to simply manufacture the multilayer wiring board is provided. A core substrate with two or more wiring layers provided thereon through an electrical insulating layer. The core substrate has a plurality of throughholes filled with an electroconductive material, and the front side and back side of the core substrate have been electrically connected to each other by the electroconductive material. The throughholes have an opening diameter in the range of 10 to 100 μm. An insulation layer and an electroconductive material diffusion barrier layer are also provided, and the electroconductive material is filled into the throughholes through the insulation layer. A first wiring layer provided through an electrical insulating layer on the core substrate is connected to the electroconductive material filled into the throughhole through via.
Public/Granted literature
- US20190394886A1 MULTILAYER WIRING BOARD Public/Granted day:2019-12-26
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