A programmable controller includes multiple interface circuitry modules and multiple CPU modules. An interface circuitry module of the interface circuitry modules transmits potential signal having electric potential state of different electric potential states to a CPU module of the CPU modules, the CPU module is connectable to a second CPU module of the CPU modules and includes a CPU which performs arithmetic processing and a memory that stores discrimination and definition information, the discrimination information includes binarized information indicating whether the CPU in the CPU module is main or sub CPU, the first discrimination information is set based on the electric potential state of the potential signal input into the CPU module from the interface circuitry module to which the CPU module is connected, and the definition information includes setting information indicating whether the CPU in the CPU module is set in advance as the main CPU or sub CPU.