Invention Grant
- Patent Title: Memory input hold time adjustment
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Application No.: US16287463Application Date: 2019-02-27
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Publication No.: US10770122B2Publication Date: 2020-09-08
- Inventor: Atul Katoch , Sanjeev Kumar Jain , Marcin Dziok
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Merchant Gould P.C.
- Main IPC: G11C7/22
- IPC: G11C7/22 ; G11C11/419

Abstract:
A device for providing gated data signals includes a delay path configured to receive an input signal and output the input signal that is delayed from the input signal by a time interval; a gating signal generator configured to supply a gating signal; a gating circuit configured to receive the data signal from the delay path at the data input, receive the gating signal at the gating input, and output at the data output an output signal indicative of the received data signal when the gating signal is present at the gating input; and a delay controller configured to receive a variable delay control signal and set the delay time interval according to the delay control signal.
Public/Granted literature
- US20200043534A1 HOLD TIME ADJUSTMENT Public/Granted day:2020-02-06
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