Invention Grant
- Patent Title: Semiconductor structures and fabrication methods thereof
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Application No.: US15496026Application Date: 2017-04-25
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Publication No.: US10770360B2Publication Date: 2020-09-08
- Inventor: Fei Zhou
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai CN Beijing
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee Address: CN Shanghai CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@14d62255
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/28 ; H01L27/092 ; H01L29/08 ; H01L29/49 ; H01L29/66

Abstract:
A method for fabricating a semiconductor structure includes providing a base structure including a substrate, a dielectric layer formed on the substrate, a plurality of first openings formed in the dielectric layer in a first transistor region, and a plurality of second openings formed in the dielectric layer in a second transistor region. The method also includes forming a first work function layer an the dielectric layer covering bottom and sidewall surfaces of the first and the second openings, forming a first sacrificial layer in each first opening and each second opening with a top surface lower than the top surface of the dielectric layer, removing a portion of the first work function layer exposed by the first sacrificial layer, removing the first work function layer formed in each first opening, and forming a second work function layer and a gate electrode in each first opening and each second opening.
Public/Granted literature
- US20180012810A1 SEMICONDUCTOR STRUCTURES AND FABRICATION METHODS THEREOF Public/Granted day:2018-01-11
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