Oscillator bias stabilization circuit for single-pin crystal oscillators
Abstract:
An oscillator bias stabilization circuit and method for biasing the circuit is disclosed. The bias stabilization circuit includes a plurality of resistive dividers responsive to a control signal in the circuit. The plurality of resistive dividers are selectably connectable in the circuit to provide an adaptable equivalent resistance in response to a control signal while keeping a bias voltage produced by the circuit substantially constant as the loop gain of an oscillator is varied. The plurality of resistive dividers are coupled to a node in the oscillator that establishes the bias voltage.
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