A semiconductor device of an embodiment includes a path monitor circuit provided in a predetermined data path in a circuit that operates with a predetermined source clock, the path monitor circuit being configured to generate an output corresponding to a degree of a timing margin, a power supply voltage control circuit configured to set a power supply voltage that is used in the circuit based on an output of the path monitor circuit, and a clock generating circuit configured to supply to the circuit a clock obtained by dividing a frequency of the source clock, based on a detection result indicating that the power supply voltage obtained based on the output of the path monitor circuit becomes lower than a predetermined threshold.