A port processor to receive a read command in a target port. In response, use the target to process a data transfer that includes use of memory for the read transfer allocated by a storage array controller prior to receipt of the read command by the target port or while processing the data transfer and selectively mark such memory as repurposable. The port processor to receive a write command in the target port. In response to receipt of the write command, use the target to process a data transfer for the initiator associated with the write operation, wherein the process includes use of memory that the storage array controller pre-allocated or allocated based on receipt of the read command by the target port for the transfer to the storage array controller and marked as repurposable.