Invention Grant
- Patent Title: Microprocessor with booth multiplication
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Application No.: US16163790Application Date: 2018-10-18
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Publication No.: US10776108B2Publication Date: 2020-09-15
- Inventor: Jing Chen , Xiaoyang Li , Juanli Song , Zhenhua Huang , Weilin Wang , Jiin Lai
- Applicant: Shanghai Zhaoxin Semiconductor Co., Ltd.
- Applicant Address: CN Shanghai
- Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Current Assignee: SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Current Assignee Address: CN Shanghai
- Agency: McClure, Qualey & Rodack, LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4c2aefec
- Main IPC: G06F9/22
- IPC: G06F9/22 ; G06F9/30 ; G06F9/448 ; G06F7/499 ; G06F7/533 ; G06F15/78 ; G06F9/38 ; G06N3/063

Abstract:
A microprocessor provides at least two storage areas and uses a datapath for Booth multiplication. According to a first and second field of a microinstruction, the datapath gets multiplicand number supply data from the first storage area and multiplier number supply data from the second storage area. The datapath operates according to a word length indicated in a third field of the microinstruction. The datapath gets multi-bit acquisitions for Booth multiplication from the multiplier number supply data. The datapath divides the multiplicand number supply data into multiplicand numbers according to the word length, and performs Booth multiplication on the multiplicand numbers based on the multi-bit acquisitions to get partial products. According to the word length, the datapath selects a part of the partial products to be shifted and added for generation of a plurality of products.
Public/Granted literature
- US20190227770A1 MICROPROCESSOR WITH BOOTH MULTIPLICATION Public/Granted day:2019-07-25
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