Invention Grant
- Patent Title: Load exploitation and improved pipelineability of hardware instructions
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Application No.: US16123761Application Date: 2018-09-06
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Publication No.: US10776207B2Publication Date: 2020-09-15
- Inventor: Robert F. Enenkel , Christopher Anand , Lucas Dutton , Adele Olejarz
- Applicant: International Business Machines Corporation , Christoper Anand , Lucas Dutton , Adele Olejarz
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Main IPC: G06F11/14
- IPC: G06F11/14 ; G06F7/483 ; G06F9/30 ; G06F7/544 ; G06F7/498

Abstract:
A method, computer program product, and a computer system are disclosed for processing information using hardware instructions in a processor of a computer system by performing a hardware reduction instruction using an input to calculate at least one range reduction factor of the input; performing a hardware restoration instruction using the input to calculate at least one range restoration factor of the input; and performing a final fused multiply add (FMA) type of hardware instruction or a multiply (FM) hardware instruction by combining an approximation based on a value reduced by the at least one range reduction factor with the at least one range restoration factor.
Public/Granted literature
- US20200081784A1 LOAD EXPLOITATION AND IMPROVED PIPELINEABILITY OF HARDWARE INSTRUCTIONS Public/Granted day:2020-03-12
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