A vehicle safety electronic control system (11) including master and slave microcontrollers (12, 13). The master microcontroller (12) is connected to a TDMA network bus, and the slave microcontroller (13) is connected to the master microcontroller (12) via a general purpose input/connection (14). Both microcontrollers (12, 13) are configured to operate schedule table based execution, and each has a respective synchronization counter. The master microcontroller (12) is configured to update its synchronization counter in response to a primary synchronization signal (19) from the network bus (10), and to issue a corresponding secondary synchronisation signal (20) to the slave microcontroller (13) via the general purpose input/output connection (14). The slave microcontroller (13) is configured to update its synchronization counter in response to the secondary synchronization signal (20) from the master microcontroller (12) such that the schedule tables of both microcontrollers (12, 13) are synchronized to the network bus (10).