Invention Grant
- Patent Title: Power optimization by rendering low-resolution tiles during page load
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Application No.: US14973512Application Date: 2015-12-17
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Publication No.: US10777164B2Publication Date: 2020-09-15
- Inventor: Shiu Wai Hui , Site Mao , Shyama Prasad Mondal
- Applicant: Qualcomm Innovation Center, Inc.
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Neugeboren O''Dowd PC
- Main IPC: G09G5/00
- IPC: G09G5/00 ; G09G5/391 ; G06F16/957 ; G06F40/14 ; G06F40/103 ; G09G5/34

Abstract:
A method for rendering content includes initiating a rasterization of a complete version of webpage content, the webpage content including a set of webpage elements, and setting an original tile pixel resolution of the set of webpage elements to be the same as a screen pixel resolution of a display on a content display device. The method includes rasterizing the set of webpage elements at a lower tile resolution onto a tile buffer, the lower tile pixel resolution differing from the original tile pixel resolution by a scaling factor. The method includes scaling up the set of webpage elements rasterized at the lower tile pixel resolution to the screen pixel resolution of the display. Finally, the method includes compositing the rasterized set of webpage elements onto a display during the rasterization of the complete version of the webpage content, and then compositing the complete version of the webpage content.
Public/Granted literature
- US20160180803A1 POWER OPTIMIZATION BY RENDERING LOW-RESOLUTION TILES DURING PAGE LOAD Public/Granted day:2016-06-23
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