Invention Grant
- Patent Title: Output buffer circuit with non-target ODT function
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Application No.: US16707783Application Date: 2019-12-09
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Publication No.: US10777257B1Publication Date: 2020-09-15
- Inventor: Tetsuya Arai , Junki Taniguchi
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C11/40
- IPC: G11C11/40 ; H03K19/177 ; G11C11/4093 ; G11C11/4096 ; H03K19/00 ; H03K3/037 ; H03K19/094 ; H03K19/17772 ; H03H11/28 ; H03K19/17784

Abstract:
Disclosed herein is an apparatus that includes: a data terminal; a first output transistor connected between the data terminal and a first power line supplying a first power potential; a first tristate circuit including an output node connected to a control electrode of the first output transistor, a first pull-up transistor configured to drive the output node to a first logic level, and a first pull-down transistor configured to drive the output node to a second logic level; and a second tristate circuit including an output node connected to the control electrode of the first output transistor, a second pull-up transistor configured to drive the output node to the first logic level, and a second pull-down transistor configured to drive the output node to the second logic level. The second pull-up and pull-down transistors have a different threshold voltage from the first pull-up and pull-down transistors.
Information query