Invention Grant
- Patent Title: Selectable trim settings on a memory device
-
Application No.: US16587283Application Date: 2019-09-30
-
Publication No.: US10777292B2Publication Date: 2020-09-15
- Inventor: Aswin Thiruvengadam , Daniel L. Lowrance , Peter Feeley
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C8/00
- IPC: G11C8/00 ; G11C29/02 ; G11C16/10 ; G06F12/02 ; G11C16/32 ; G06F3/06 ; G11C7/10 ; G06F16/18 ; G11C16/34 ; G11C7/04 ; G11C29/44
Abstract:
The present disclosure includes apparatuses and methods related to selectable trim settings on a memory device. An example apparatus can store a number of sets of trim settings and select a particular set of trims settings of the number of sets of trim settings based on desired operational characteristics for the array of memory cells.
Public/Granted literature
- US20200027517A1 SELECTABLE TRIM SETTINGS ON A MEMORY DEVICE Public/Granted day:2020-01-23
Information query
