Invention Grant
- Patent Title: Fin-type FET with low source or drain contact resistance
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Application No.: US16419287Application Date: 2019-05-22
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Publication No.: US10777647B2Publication Date: 2020-09-15
- Inventor: Kangguo Cheng , Juntao Li , Heng Wu , Peng Xu
- Applicant: ELPIS TECHNOLOGIES INC.
- Applicant Address: CA Ottawa, Ontario
- Assignee: ELPIS TECHNOLOGIES INC
- Current Assignee: ELPIS TECHNOLOGIES INC
- Current Assignee Address: CA Ottawa, Ontario
- Agency: VanTek IP LLP
- Agent Shin Hung
- Main IPC: H01L29/417
- IPC: H01L29/417 ; H01L29/66 ; H01L21/8234 ; H01L21/8238 ; H01L29/78

Abstract:
Embodiments of the invention are directed to methods of forming a FinFET. A non-limiting example method includes forming a fin across from a major surface of a substrate. A dummy gate is formed around a channel region of the fin. A source region or a drain region is formed on the fin, and the dummy gate is replaced with a metal gate structure. Subsequent to replacing the dummy gate with the metal gate structure, dopants are inserted into the source region or the drain region.
Public/Granted literature
- US20190273142A1 FIN-TYPE FET WITH LOW SOURCE OR DRAIN CONTACT RESISTANCE Public/Granted day:2019-09-05
Information query
IPC分类: