Invention Grant
- Patent Title: Semiconductor integrated circuit and signal processing method
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Application No.: US16069779Application Date: 2017-01-20
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Publication No.: US10782330B2Publication Date: 2020-09-22
- Inventor: Shigetaka Mori
- Applicant: SONY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: SONY CORPORATION
- Current Assignee: SONY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Chip Law Group
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@69c65385
- International Application: PCT/JP2017/001851 WO 20170120
- International Announcement: WO2017/135061 WO 20170810
- Main IPC: G01R27/26
- IPC: G01R27/26 ; G01R27/02 ; G01R31/00 ; G01R29/24 ; G01R31/01 ; G01R31/28 ; G01N27/22 ; H03K5/15

Abstract:
The present disclosure relates to a semiconductor integrated circuit and a signal processing method that can improve measurement accuracy. Pulses subjected to pulse generation and disconnection control by a control circuit are supplied to a pulse distribution circuit and a CP circuit. The pulse distribution circuit divides one pulse into two or more pulses that do not overlap each other, and supplies the pulses to a CBCM circuit. The CBCM circuit is configured by connecting a capacitance element to be measured to the output of a measurement core circuit called a pseudo inverter. The CP circuit inputs, to the gate electrode, pulses that cause a channel of a non-measurement MISFET to change from the accumulation state to the inverted state, and monitors, from the substrate side, a CP current flowing through a trap acting as a recombination center of the gate insulating film and the semiconductor substrate interface. The present disclosure can be applied to, for example, a semiconductor integrated circuit for evaluating the characteristics of the gate insulating film of the MISFET.
Public/Granted literature
- US20190049498A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND SIGNAL PROCESSING METHOD Public/Granted day:2019-02-14
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